Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1998-08-17
2000-07-04
Follansbee, John A.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711122, 711129, 711130, 712 28, G06F 1216
Patent
active
060852933
ABSTRACT:
A non-uniform memory access (NUMA) computer system includes a node interconnect and a plurality of processing nodes that each contain at least one processor, a local interconnect, a local system memory, and a node controller coupled to both a respective local interconnect and the node interconnect. According to the method of the present invention, a communication transaction is transmitted on the node interconnect from a local processing node to a remote processing node. In response to receipt of the communication transaction by the remote processing node, a response including a coherency response field is transmitted on the node interconnect from the remote processing node to the local processing node. In response to receipt of the response at the local processing node, a request is issued on the local interconnect of the local processing node concurrently with a determination of a coherency response indicated by the coherency response field.
REFERENCES:
patent: 5673413 (1997-09-01), Deshpande et al.
patent: 5878268 (1999-03-01), Hagersten
patent: 5887146 (1999-03-01), Baxter et al.
Carpenter Gary Dale
Glasco David Brian
Iachetta, Jr. Richard Nicholas
El-Hady Nabil
Follansbee John A.
International Business Machines - Corporation
Salys Casimer K.
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