Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
Reexamination Certificate
2006-10-03
2006-10-03
Treat, William M. (Department: 2181)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Reducing an impact of a stall or pipeline bubble
Reexamination Certificate
active
07117345
ABSTRACT:
A method of executing more than one thread at a time in a computer system that has a plurality of threads, including a first and second thread. The method comprises providing a first and a second reorder buffer, reading first instructions and first operands associated with the first thread from the first reorder buffer, executing one of the first instructions and storing a result in the first reorder buffer which includes marking the result with a tag associating the result with the first thread, reading second instructions and second operands associated with the second thread from the second reorder buffer, and executing one of the second instructions and storing a result in the second reorder buffer which includes marking the result with a tag associating the result with the second thread.
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Janik Kenneth J.
Lu Shih-Lien L.
Miller Michael F.
Intel Corporation
Schwegman Lundberg Woessner & Kluth P.A.
Treat William M.
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