Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2000-09-26
2003-01-14
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S754000, C252S079300, C252S079400, C051S308000, C051S309000
Reexamination Certificate
active
06506682
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to non-selective slurries used for chemical mechanical polishing (CMP) of a metal layer and a method for manufacturing thereof, and further to a method for forming a plug in an insulating layer on a wafer. More particularly, the present invention relates to slurries for CMP capable of removing a metal layer, a barrier layer and an insulating layer simultaneously because of nearly equal polishing removal rates and a method for fabricating thereof, and a method for forming a plug in a wafer insulating layer using such a slurry.
2. Description of the Related Art
As the relative sizes of semiconductor devices are scaled down and as the number of metal wire layers increases, surface irregularities are more likely to be transcribed onto adjacent layers, and, as a result, the degree of bending of the uppermost layer increases. In some cases, such bending may have such a drastic influence on the device structure, so that it is impossible to form a desired shape in the next processing step. Additionally, as devices become more highly integrated, a bottom film planarization technology is required to assure photo margin and to minimize wire length.
In view of the above, a planarization process has become popular as a means for removing the bending of an irregular surface during the semiconductor fabrication process.
Popular methods for planarizing the bottom film include SOG(Spin On Glass), etch-back, BPSG(boro-phospho silicate glass) reflow, Al flow, and CMP. Among these techniques, CMP has become recognized as an effective planarization technology and is used widely because CMP accomplishes both global planarization and low temperature planarization of a relatively wide space, which can not be accomplished by, for example, the reflow or etch-back processes.
In the CMP process, a rotating polishing pad is pressed in direct contact with the wafer and a polishing slurry is provided to the wafer/pad interface. The surface of the wafer is planarized and polished mechanically and chemically by the polishing pad coated with the slurry. The polishing rate, the polished surface imperfections, defects, and corrosion and erosion vary according to the composition of the slurry.
A method for forming a plug using a CMP process according to the conventional approaches is now described, with reference to
FIG. 1
a
through
FIG. 1
f.
Referring to
FIG. 1
a,
after depositing a metal of conductive material on a semiconductor substrate
100
, a metal pattern
102
is formed by a photolithography process. As shown in
FIG. 1
b,
after depositing an interlayer insulating film
104
of low dielectric film on the metal pattern
102
, the surface of the insulating film is planarized by performing a first CMP process on the insulating film using a slurry having a high polishing selectivity ratio.
FIG. 1
c
shows the results of the first CMP process. In the CMP process, a surface of a wafer is placed in direct contact with a polishing pad attached to a rotating table in direct contact with the pad. During the polishing process, a carrier applies pressure against the wafer while the pad and table are rotated. A slurry is provided between the wafer and pad, and polishing is facilitated by the rotational movement of the pad and is continued in this manner until the low dielectric film
104
is planarized. Defects such as scratches or pitting
106
can be created on a portion of the surface of the interlayer insulating film
104
by, for example, solid abrasives within the slurry.
Referring to
FIG. 1
d,
a via hole
108
is formed by a photolithography process on said planarized insulating film
104
. Then, as shown in
FIG. 1
e,
a barrier layer
110
and metal layer
112
such as titanium(Ti) or titanium nitride(TiN) are deposited successively on the wafer where the via holes
108
are formed.
Finally, the metal layer
112
and the barrier layer
110
on the low dielectric film
104
are removed by a second CMP process using a slurry, for example as referred to in U.S. Pat. Nos. 5,922,091, 5,916,855, 5,858,813 and 5,866,031, having a good selectivity to the metal. A sidewall layer and a metal layer remain within the via hole
108
and thus a via plug
114
is formed as shown in
FIG. 1
f.
However, if a slurry having different selectivities for the metal and the dielectric film is used, as shown in
FIG. 1
f,
metallic residue
116
, possibly inducing a metal bridge, can remain as shown in
FIG. 1
f
in the pitted portions
106
previously created during the planarization of the low dielectric film
104
. For this reason, an additional CMP process, or multiple additional CMP processes, must be performed to remove the metal residue. However, these excessive metal CMP procedures, as shown in
FIG. 1
f,
create metal recesses
114
resulting from the selectivity difference and, as a result, the electrical resistance value of the via hole increases.
To address this issue, a non-selective ammonium persulfate slurry is disclosed in U.S. Pat. No. 5,726,099. According to this technique, after planarizing the dielectric film, the pattern formation and the metal deposition are performed, and the metal layer is removed. Finally, the planarization is performed by polishing the metal layer and the insulating layer simultaneously using the non-selective slurry. In this manner, metallic residue is removed and the generation of metal recesses is prevented; however, the process is complicated and therefore expensive to carry out.
Furthermore, the excessive use of a slurry having an oxidizing agent in order to increase the removal rate of a metal adversely affects device yield through the lowering of the electrical characteristics of the device, or the worsening of metal corrosion following the CMP process arising from an increase in the impurity density within the slurry. Further, the competitive power of the resulting product is lowered because of the deterioration of slurry quality, the increase of danger, and the increase of the fabrication cost of the slurry.
SUMMARY OF THE INVENTION
An object of the present invention is to provide non-selective slurries capable of removing a metal layer, a barrier layer and an insulating layer simultaneously during a single CMP process using non-selective slurries with nearly equal polishing rates and a method for fabricating thereof.
Another object of the present invention is to provide non-selective slurries and a method for fabricating thereof which reduces the fabrication cost of a slurry by using a small amount of oxidizing agent with the recycling of the oxidizing agent, and which improves the quality and the safety of the slurry.
A further object of the present invention is to provide a method for forming a plug in an insulating layer on a wafer that enables the simplification of the fabrication process by removing a metal layer, a barrier layer and an insulating layer simultaneously by a single CMP process using non-selective slurries.
According to one aspect of the present invention to accomplish said objects, a non-selective slurry of the present invention is provided. The non-selective slurry simultaneously chemically and mechanically polishes a metal layer, a barrier layer and an insulating layer. The slurry comprises a first oxidizing agent for reducing a second oxidizing agent, the second oxidizing agent being reduced by oxidizing said metal layer, and being recycled by the first oxidizing agent recovering the oxidizing power of the second oxidizing agent. An additive for increases the polishing rate of said barrier layer, and an abrasive is provided in an aqueous medium, such that the removal rates over said metal layer, barrier layer and insulating layer are nearly equal.
A method for fabricating a non-selective slurry of the present invention comprises a step of preparing an abrasive for polishing an insulating layer of strong alkalinity, a step of making a slurry of strong acidity by adding a first oxidizing agent and a second oxidizing agent into the abrasive for polishing an insulating
Hah Sang Rok
Lee Jong Won
Ghyka Alexander
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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