Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2006-05-02
2006-05-02
Pham, Hoai (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S666000, C438S122000
Reexamination Certificate
active
07037753
ABSTRACT:
A semiconductor chip package having a non-planar chip therein, to reduce the stress concentrations between the chip and cover plate. In particular, a chip and method of forming a chip having a non-planar or “domed” back surface, wherein the thickness of the non-planar chip is greatest substantially near the center of the chip. Further, a method of rounding the edges or corners of the chip to reduce crack propagation originating at the edges of the chip.
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“High Performance Carrier Technology: Materials And Fabrication”, by Light et al, 1993 International Electronics Packaging Conference, San Diego, California; vol. One.
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Brodsky William L.
Sathe Sanjeev B.
Thiel George H.
Nguyen Dilinh
Pham Hoai
Schmeiser Olsen & Watts
Steinberg William H.
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