Non-invasive bus master back-off circuit and method for systems

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

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Details

710110, G06F 1300

Patent

active

061122726

ABSTRACT:
A non-invasive processor bus master back off enables bus mastership to be changed without interrupting execution of time critical routines of the current bus master. The current bus master recognizes when a time critical routine is being executed. Thus, if a request to back-off the bus is received while a time critical routine is being executed, the current bus master completes execution of the time critical routine prior to pausing and relinquishing the bus to the requesting bus master. Non-invasive back-off structure includes a bus; a first bus master coupled to the bus where the first bus master executes routines that transfer data over the bus; a second bus master coupled to the bus; and a non-invasive back-off circuit coupled to the first and second bus masters. The non-invasive back-off circuit generates a back-off pause enablement signal that enables transfer of control of the bus from the first bus master to the second bus master only when execution of a routine by the first bus master is not time critical.

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