Non-destructive read out field effect transistor memory cell sys

Details Non-destructive read out field effect transistor memory cell sys Non-destructive read out field effect transistor memory cell sys

1980-01-30

1982-06-15

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

365184, G11C 1140

Patent

active

043354505

ABSTRACT:
A non-destructive read out memory cell system is provided having a semiconductor substrate supporting an array of memory cells each of which includes a field effect transistor having a source and a drain defining a channel region having high and low threshold sections. In a first embodiment the channel region is further defined by the upper surface of the semiconductor substrate, and in second and third embodiments the channel region is further defined by a V-groove and by a U-groove, respectively, formed in the substrate. A gate electrode separated from the surface of the semiconductor substrate by a thin insulating layer is disposed over the channel region. A storage node, preferably an N+ diffusion region, is located within the substrate adjacent to the high threshold section of the channel region. Pulsing means are provided for selectively charging and discharging the storage node and sensing means are provided to determine the flow of current passing through the channel region, which is representative of the binary information contained on the storage node.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3811076 (1974-05-01), Smith
patent: 3841926 (1974-10-01), Garnache
patent: 3971055 (1976-07-01), Arai
patent: 3986180 (1976-10-01), Cade
patent: 4105475 (1976-10-01), Jenne
patent: 4161741 (1979-07-01), Collet et al.
patent: 4163985 (1979-08-01), Schuemeyer
IBM Tech. Dis. Bul., vol. 21, No. 6, Nov. 1978, pp. 2329-2330, "Sciyli Electrode VMOS RAM", by I. T. Ito et al.
"Multilevel RAM Using One Transistor Per Cell", by R. A. Heald et al. in IEEE Journal of Solid-State Circuits, vol. SC-11, No. 4, Aug. 1976, pp. 519-528.

Affiliated with

Also associated with

Rating

Non-destructive read out field effect transistor memory cell sys does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-destructive read out field effect transistor memory cell sys, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-destructive read out field effect transistor memory cell sys will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1921854