Non-destructive memory read strobe pulse optimization...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S194000

Reexamination Certificate

active

07016240

ABSTRACT:
A method for determining a read strobe pulse delay for data read from a memory having a plurality of memory chips. Each one of the chips provides data along with an associated read strobe pulse. The data read from each one of the plurality of chips is stored in a corresponding one of a plurality of storage devices in response to the read strobe pulse associated with such one of the plurality of chips. A training system determines a delay which when applied in to the plurality of read strobe pulses enables valid read data from the plurality of memory chips to be stored in each one of the plurality of the storage device in response to the read strobe pulses being delayed by the read pulse strobe delay. A process is used to enable preservation of the user data during the training process for use subsequent to the training process.

REFERENCES:
patent: 6646929 (2003-11-01), Moss et al.

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