Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent
1995-10-26
1997-02-25
Hudspeth, David R.
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
326 21, 3652335, H03K 19003
Patent
active
056062699
ABSTRACT:
A circuit for detecting an input signal, the circuit having an input node and an output node, includes a first latch having a set input coupled to the input node, for detecting falling transitions at the input node. A second latch having a set input coupled to the input node, detects rising transitions at the input node. A first logic device, responsive to outputs of the first and second latches, detects that an input signal has been received at both the first and second latches. A second logic device, responsive to a complement output of both the first and second latches, resets both the first and second latches.
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Pontius Dale E.
Tamlyn Robert
Hudspeth David R.
International Business Machines - Corporation
Walter, Esq. Howard J.
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