Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
1999-03-31
2001-01-30
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S027000, C326S026000, C326S028000, C326S086000, C326S087000, C327S034000, C327S310000, C327S312000
Reexamination Certificate
active
06181156
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to electronic circuits in general, and in particular to noise suppression circuits. Still more particularly, the present invention relates to noise suppression circuits for suppressing above-supply and below-ground noises.
2. Description of the Prior Art
As electronic circuits continue to reduce in size, metallurgical limitations begin to have more influence on line-to-line interconnect coupling. At a minimum, line-to-line interconnect coupling can increase effective load capacitance if a signal line is switching when a neighboring net is concurrently switching in an opposite direction from the signal line. As a result, there will be an increase in switching time for the signal line.
Furthermore, line-to-line interconnect coupling can also cause noise. Generally speaking, noise can bounce in one or more of the following four distinct directions: above ground, below ground, above power supply, and below power supply. Noises that are above ground and below power supply can cause false switching events if the coupling effects cause a signal to cross the switching threshold of a given destination circuit. On the other hand, noises that are below ground and above power supply can cause a loss of state in some types of latch circuits.
Thus, it is desirable to eliminate those effects, such as noises, that are caused by the line-to-line interconnect coupling. The present invention provides a noise suppression circuit for suppressing noises that are above power supply and a noise suppression circuit for suppressing noises that are below ground.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, a noise suppression circuit for suppressing noises includes a means for generating a power-on-reset signal, a clamping transistor, and a feedback circuit. The means for generating a power-on-reset signal presets an internal latch of the noise suppression circuit to a predetermined state, such as a logical high state. The clamping transistor restores the state of a data input of a circuit to which the noise suppression circuit is providing protection, after the occurrence of a noise coupling event. The feedback circuit then turns off the clamping transistor after a predetermined amount of time.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
REFERENCES:
patent: 5065048 (1991-11-01), Asai et al.
patent: 5646557 (1997-07-01), Runyon et al.
patent: 5734277 (1998-03-01), Hu et al.
patent: 5793226 (1998-08-01), Park et al.
patent: 5933021 (1999-08-01), Mohd
Durham Christopher McCall
Klim Peter Juergen
Felsman Bradley Vaden Gunter & Dillon, LLP
International Business Machines - Corporation
Salys Casimer K.
Tan Vibol
Tokar Michael
LandOfFree
Noise suppression circuits for suppressing noises above and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Noise suppression circuits for suppressing noises above and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Noise suppression circuits for suppressing noises above and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2534500