Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Patent
1993-04-23
1995-06-20
Westin, Edward P.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
326 83, H03K 1716
Patent
active
054263760
ABSTRACT:
An I/O buffer is provided that is noise-isolated, i.e., less susceptible to the effect of switching noise. In particular, a noise isolated I/O buffer includes an output terminal, a transient switching circuit connected to first power and ground voltage sources, to a logic input signal and to the output terminal, and a logic holding circuit connected to second power and ground voltage sources separate from the first power ground voltage sources, to the logic input signal and to the output terminal. The transient switching circuit causes a logic level of the output terminal to be switched responsive to a change in the input signal. The logic holding circuit causes the logic level of the output terminal to be maintained in the absence of a change in the input signal. In the absence of a change in the input signal, the transient switching circuit may be turned off, therefore presenting a high impedance to the first power and ground voltage sources. Switching noise in the first power supply network therefore is not transmitted through to the outputs of unswitched I/O buffers. The transient switching circuit and the logic holding circuit may be connected to the same power and ground voltage sources. The transient switching circuit, however, is turned off in the absence of a change in the input signal, and the logic holding circuit is turned off responsive to a change in the input signal. Smaller current surges are therefore provided at different times rather than a single large current surge, thereby reducing dI/dt.
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Mattos Derwin W.
Shiffer, II James D.
Wong Jeffrey F.
Driscoll Benjamin D.
VLSI Technology Inc.
Westin Edward P.
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