Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1998-04-14
2001-07-03
Hjerpe, Richard (Department: 2774)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S212000, C345S213000, C345S011000
Reexamination Certificate
active
06256026
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a noise filter and related method and, more particularly, to a noise filter for filtering the noise of a pulse generated from a signal generator, using it as a power source.
BACKGROUND OF THE INVENTION
Generally speaking, a system for processing a signal output from a signal generator includes a TV and display monitor. These devices have a filter circuit so that the signal output from a signal generator is supplied stably.
From now on, there will be explained a conventional display monitor having a noise filter in order to eliminate a noise component contained in the sync signal output from a personal computer (PC) signal generator.
FIG. 1
is a block diagram of an internal circuit of a generally used monitor. As in
FIG. 1
, PC
100
processes a key signal produced from a keyboard (not shown) through CPU
110
, generating data. This data is received in video card
120
, and is processed into video signals R,G,B. Video card
120
outputs horizontal and vertical sync signals H-SYNC and V-SYNC for synchronizing output video signals R,G,B.
These output video signals R,G,B from video card
120
of PC
100
are applied and amplified in video AMP
280
of display monitor
200
, and are then sent to a cathode ray tube (CRT)
290
. Horizontal/vertical sync signal H/V-SYNC output from video card
120
of PC
100
is received by noise filter
210
of a video input (not shown). Noise filter
210
receiving horizontal/vertical sync signal H/V-SYNC filters its noise.
The horizontal/vertical sync signal H/V-SYNC noise-filtered through noise filter
210
is sent to horizontal/vertical signal processor
220
a
incorporated in microcomputer
220
. Microcomputer
220
determines the resolution of output video signals R,G,B from video card
120
of PC
100
according to horizontal/vertical sync signal H/V-SYNC applied to horizontal/vertical signal processor
220
a.
Microcomputer
220
outputs an oscillation signal through horizontal/vertical oscillation signal processor
220
a
according to the determination result. The oscillation signal output from horizontal/vertical oscillation signal processor
220
a
is received in horizontal/vertical oscillation signal output portion
230
. The horizontal/vertical oscillation signal portion
230
, receiving the oscillation signal, outputs horizontal and vertical oscillation pulses according to the oscillation signal applied.
The horizontal oscillation pulse output from horizontal/vertical oscillation signal output portion
230
is received in horizontal drive circuit
240
so that it supplies a drive current sufficient to enable horizontal output circuit
250
to switch. The horizontal output circuit
250
, receiving the drive current output through horizontal drive circuit
240
, switches according to the drive current applied so that a horizontal sawtooth wave current is produced in horizontal deflection yoke H-DY.
A vertical drive circuit
260
receives the vertical oscillation pulse output from horizontal/vertical oscillation signal output portion
230
, and supplies a drive current to vertical output circuit
270
. The vertical output circuit
270
, receiving the drive current output from vertical drive circuit
260
, provides a vertical sawtooth wave current to vertical deflection yoke V-DY according to the drive current applied.
The CRT
290
, receives the video signals R,G,B output from video AMP
280
according to the cycle of sawtooth wave current produced in horizontal and vertical deflection yokes H-DY and V-DY, and displays an image with video signals R,G,B according to the cycle of the horizontal and vertical sawtooth waves.
Noise filter
210
for removing noise contained in horizontal/vertical sync signal H/V-SYNC output from video card
120
of PC
100
will be described below in more detail.
When noise produced through PC
100
and signal cable (not shown) is mixed in the horizontal and vertical sync signals output from video card
120
of PC
100
, the deflection becomes unstable so that an image is displayed unstably on CRT
290
. Especially, if noise is mixed in horizontal sync signal H-SYNC, the image is dispersed or becomes unstable due to the noise.
In order to remove such distortion and noise mixed in horizontal sync signal H-SYNC, noise filter
210
is provided with a resistor and a capacitor between the horizontal sync signal input stage (not shown) and ground. Noise filter
210
using the resistor and capacitor cannot be employed in a product of horizontal sync signal frequency below 48 KHz, and thus it is disadvantageous in broad usage.
In order to overcome this problem, according to the conventional art, noise filter
210
is formed with a buffer IC (not shown) to eliminate the noise component contained in horizontal sync signal H-SYNC. Noise filter
210
using the buffer IC unfavorably requires a driving power (generally +5V) output from the secondary side of the power circuit (not shown) under conditions where the display monitor
200
normally operates.
Further, filtering is performed only within a range (generally 1.5V-3.15V) limited to noise immunity prescribed in the buffer IC specification. Above that value, filtering is not carried out so that noise over 3.15V is not removed.
SUMMARY OF THE INVENTION
Therefore, in order to overcome such drawbacks of the prior art, an objective of the present invention is to provide a noise filter and related method using a low-power consumed CMOS logic circuit and using a signal produced from a signal generator as a power source, without its separate driving source, so that broader filtering is performed by being sensitive to noise even within a range of relatively low noise immunity.
To accomplish the objective of the present invention, there is provided a noise filter comprising: a rectifier for receiving and rectifying a pulse output from a signal generator; and a CMOS logic IC for converting the pulse rectified output from the rectifier into a power source, and filtering the noise component mixed in the pulse output from the signal generator.
REFERENCES:
patent: 3944883 (1976-03-01), Henley et al.
patent: 4263615 (1981-04-01), Steinmetz et al.
patent: 4272705 (1981-06-01), Beaumont
patent: 5838312 (1998-11-01), Kim
patent: 5949400 (1999-09-01), Kim
patent: 5952787 (1999-09-01), Jang
patent: 6026001 (2000-02-01), Kim
Bushnell , Esq. Robert E.
Dinh Duc
Hjerpe Richard
Samsung Electronics Co,. Ltd.
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