Noise attenuation output buffer

Details Noise attenuation output buffer Noise attenuation output buffer

1995-08-22

1996-11-05

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 26, 326 83, H03K 1716

Patent

active

055721460

ABSTRACT:
A noise attenuation output buffer comprising a signal delay circuit for delaying input data for a predetermined time period, a NOR gate for NORing an output signal from the signal delay circuit and an enable signal, a pull-up/down driver for performing a pull-up operation in response to the input data and a pull-down operation in response to an output signal from the NOR gate to provide output data, a noise attenuation controller for outputting a noise attenuation signal in response to a drive voltage, the input data and the output signal from the NOR gate, and a noise attenuator for forming a current path between an output terminal of the NOR gate and a ground terminal in response to the noise attenuation signal from the noise attenuation controller and the output data from the pull-up/down driver to suppress the generation of noise. According to the present invention, the noise attenuation output buffer effectively controls ON timing of the noise attenuator to effectively attenuate noise in the output data and enhance the data output speed.

REFERENCES:
patent: 5059823 (1991-10-01), Ahsanullah
patent: 5233238 (1993-08-01), Mattos
patent: 5319260 (1994-06-01), Wanlass
patent: 5367205 (1994-11-01), Powell
patent: 5438545 (1995-08-01), Sim
patent: 5450019 (1995-09-01), McClure et al.
patent: 5491428 (1996-02-01), Gasparik
patent: 5497113 (1996-03-01), Uber

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