Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1997-06-27
1998-11-10
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
36518911, 36518907, G11C 700
Patent
active
058354204
ABSTRACT:
An on-chip system receives raw positive and negative voltages from voltage pumps and provides CMOS-compatible bandgap-type positive and negative reference voltages from at least one of which regulated positive and negative Vpp and Vpn voltages are generated. A bitline (BL) regulator and a sourceline (SL) regulator receive Vpp and generate a plurality of BL voltages and SL voltages, and use feedback to compare potential at selected BL nodes and SL nodes to a reference potential using a multi-stage differential input differential output comparator. Reference voltages used to create BL and SL potentials may be varied automatically as a function of addressed cell locations to compensate for ohmic losses associated with different cell array positions. The system includes positive and negative wordline (WL) regulators that each use feedback from selected WL nodes. The system further includes a WL detector and magnitude detector for Vdd and Vpp, and can accommodate multiple level memory (MLC) cells by slewing reference voltages used to output regulated voltages. The system preferably is fabricated on the same IC chip as the address logic and memory array using the regulated potentials.
REFERENCES:
patent: 5508604 (1996-04-01), Keeth
patent: 5511026 (1996-04-01), Cleveland et al.
Hsu Fu-Chang
Lee Peter W.
Tsao Hsing-Ya
Aplus Flash Technology Inc.
Le Vu A.
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