Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-09-10
2003-12-09
Fahmy, Wael (Department: 1772)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S118000, C257S778000, C257S795000
Reexamination Certificate
active
06660560
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
Not applicable.
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention generally relates to underfill materials for flip chip devices. More particularly, this invention relates to a no-flow material for underfilling a flip chip device and an underfill method using the no-flow material.
(2) Description of the Related Art
Underfilling is well known for promoting the reliability of flip chip components, such as flip chips and ball grid array (BGA) packages that are physically and electrically connected to traces on organic or inorganic circuit boards with numerous solder bump connections. The underfill process generally involves using a specially formulated dielectric material to completely fill the void between the component and the circuit board and encapsulate the solder bump connections of the component. In conventional practice, underfilling takes place after the component is attached to the circuit board. The underfill material is placed along the perimeter of the component, and capillary action is relied on to draw the material beneath the component. For optimum reliability, the composition of the underfill material and the underfill process parameters must be carefully controlled so that voids will not occur in the underfill material beneath the component, and to ensure that a uniform fillet is formed along the entire perimeter of the component.
In addition to the flow properties necessary to achieve the required capillary action, the underfill materials must also have a suitable coefficient of thermal expansion (CTE) relative to that of the solder connections, component and circuit board. Dielectric materials having suitable flow and processing characteristics are typically thermosetting polymers such as epoxies, to which a fine particulate filler material such as silica is added to lower the CTE of the underfill material from that of the polymer to something that is more compatible with the CTE's of the component, circuit board, and the solder composition of the solder connections. An acceptable CTE for underfill materials is typically about 18 to 32 ppm/° C. As known in the art, an acceptable CTE match is necessary to reduce thermal fatigue of the solder connections. In order for the underfill material to be sufficiently flowable during the underfill process, the filler material typically has an average particle size of less than 10 micrometers. Suitable fill levels and compositions for the filler material are dependent on the particular polymer used and the amount and size of filler material necessary to achieve the desired CTE.
Highly-filled capillary-flow underfill materials are widely used in flip chip assembly processes. However, to achieve acceptable levels of manufacturability with these underfill materials, expensive process steps are typically required to repeatably produce void-free underfills. These limitations can limit the versatility of the flip chip underfill process to the extent that capillary-flow underfilling is not practical for many flip chip applications, particularly flip chips with fine pitch solder connections and low standoff heights. As a result, materials and processes are continuously sought as alternatives to underfill materials that rely on capillary action. As an example, the use of no-flow adhesives has been considered, particularly for flip chip assembly. Because of the no-flow characteristic, underfilling with a no-flow adhesive requires that the underfill is deposited as a thin layer over the trace or bond pad pattern for the flip chip component. A sufficient amount of the adhesive must be deposited that will be capable of forming a fillet around the chip without floating the chip. The chip is then placed and pressed downward so that the solder bumps contact their respective bond pads through the underfill material, after which the underfill material is cured concurrently with solder reflow. Contrary to capillary-flow underfill materials, filler materials are not typically added to no-flow underfill materials because of the tendency for the filler material to hinder the flip chip assembly process. For example, the filler material impedes the penetration of the underfill material by the solder bumps, and filler particles can become trapped between the solder bumps and the bond pads to interfere with the formation of a metallurgical bond and reduce the reliability of the electrical connection. Without a filler material to reduce their CTE, no-flow underfill materials have not been practical for use in harsh environments, such as automotive applications for flip chips on laminate circuit boards.
In view of the above, it would be desirable if an underfill material and process were available that were capable of achieving the product reliability obtained with capillary-flow underfill materials and processes, but without the cost and processing limitations of these materials.
BRIEF SUMMARY OF THE INVENTION
The present invention provides a no-flow underfill material and process suitable for underfilling flip chips employed in harsh environments. The underfill material and process are adapted to incorporate a filler material in a manner that does not compromise component placement, solder connection and reliability, and therefore are suitable for use in underfill applications that have previously required capillary-flow underfill materials.
The no-flow underfill material of this invention is used in the form of a structure that comprises at least three layers. A first of the layers is formed of an uncured first polymer dielectric material and is intended to overlie the bond pads, traces or other terminal structures of the circuit substrate to which a flip chip is to be attached. A second layer of an uncured second polymer dielectric material overlies the first layer, and a third layer of an uncured third polymer dielectric material overlies the second layer. The first and second polymer dielectric materials are substantially free of fillers that would lower their CTE's, while the third polymer dielectric material contains a filler material that has the effect of reducing the CTE of the third polymer dielectric material. In this arrangement, the unfilled first layer is nearest the bond pads, and the unfilled second layer serves as a buffer between the filled third (outermost) layer and the unfilled first (innermost) layer.
The underfill process of this invention entails providing the no-flow underfill structure on the surface region on which a flip chip is to be placed, including each bond pad to be mated with a solder bump (or other suitable reflowable terminal) and the region surrounded by the bond pads. The flip chip is then placed so that its solder bumps successively penetrate the third, second and first layers and contact their respective bond pads. Because only the third (outermost) layer of the underfill structure contains filler material, penetration of the underfill structure by the solder bumps is substantially unimpeded. Any displacement of the filler material from the first layer is generally limited to filler particles being pushed into the unfilled second layer, so that the first layer remains substantially free of filler material. An appropriate heating step is then performed by which the solder bumps are reflowed and the underfill material cured. During this step, the filler material in the third layer migrates into the unfilled first and second layers, and the first, second and third layers consolidate and cure to form a single underfill layer with a substantially uniform dispersion of the filler material. As a result of the heating step, the solder bumps form solid electrical interconnects that are individually metallurgically bonded to the bond pads through the underfill layer.
According to a preferred aspect of the invention, the underfill layer is continuous and void-free, encapsulates the solder interconnects, and completely fills the volume between the flip chip component and the cir
Chaudhuri Arun K.
Walsh Matthew R.
Workman Derek B.
Berezny Nema
Chmielewski Stefan V.
Fahmy Wael
Funke Jimmy L.
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