NMOS transistor

Details NMOS transistor NMOS transistor

1999-06-24

2000-10-24

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257396, 257372, 257549, H01L 2978

Patent

active

061371483

ABSTRACT:
The NMOS transistor is provided with a semiconducting substrate (12) which is p-doped and comprises a top side (14), and with a first region (16) which is n-doped and placed into the substrate by diffusion from the top side (14) of the substrate (12). Further, the transistor comprises a second region (18) arranged within the n-conducting region (16), which is n-doped and introduced into the substrate from the top side (14) of the substrate (12), and a field oxide layer (20) which is arranged on the top side (14) of the substrate (12) and limits the p-conducting region (16) on all sides. The top side comprises a source region (22) and a drain region (24) which are n-doped and arranged within the p-conducting region (18) at a distance to each other. A gate oxide layer (26) is arranged on the top side (14) of the substrate (12) between the source and the drain regions (22, 24). According to the invention it is envisaged that the p-conducting region (18) is placed into the n-conducting region (16) by means of ion implantation and that within the p-conducting region (18) the ion concentration on the top side (14) of the substrate (12) is smaller than that at the lower limit, located within the substrate (12), between the n-conducting region (16) and the p-conducting region (18).

REFERENCES:
patent: 5376816 (1994-12-01), Nishigoori et al.
patent: 5497023 (1996-03-01), Nakazato et al.
patent: 5675172 (1997-10-01), Miyamoto et al.
patent: 5763921 (1998-06-01), Okumura et al.
patent: 5899714 (1999-05-01), Farrenkopf et al.
patent: 5994755 (1999-10-01), De Jong et al.

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