Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Mesa structure
Reexamination Certificate
2005-03-01
2005-03-01
Kang, Donghee (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Mesa structure
C257S613000, C257S615000, C257S622000, C438S481000, C438S483000, C438S479000, C438S574000
Reexamination Certificate
active
06861729
ABSTRACT:
A nitride semiconductor substrate including (a) a supporting substrate, (b) a first nitride semiconductor layer having a periodical T-shaped cross-section, having grown from periodically arranged stripe-like, grid-like or island-like portions on the supporting substrate, and (c) a second nitride semiconductor substrate covering said supporting substrate, having grown from the top and side surfaces of said first nitride semiconductor layer, wherein a cavity is formed under the second nitride semiconductor layer.A protective layer having a periodically arranged stripe-like, grid-like or island-like apertures is formed on the supporting substrate. The first nitride semiconductor layer is laterally grown from the exposed portion of the substrate. The growth is stopped before the first nitride semiconductor layer covers the supporting substrate. Thus, the first nitride semiconductor layer has a periodical T-shaped cross-section. Then, the protective layer is removed and the second nitride semiconductor layer is grown from the top and side surface of the first nitride semiconductor layer to cover the substrate.
REFERENCES:
patent: 6030849 (2000-02-01), Hasegawa et al.
patent: 6091085 (2000-07-01), Lester
patent: 6110277 (2000-08-01), Braun
patent: 6121121 (2000-09-01), Koide
patent: 6177359 (2001-01-01), Chen et al.
patent: 6240115 (2001-05-01), Chen et al.
patent: 6252261 (2001-06-01), Usui et al.
patent: 6261929 (2001-07-01), Gehrke et al.
patent: 6335546 (2002-01-01), Tsuda et al.
patent: 6348096 (2002-02-01), Sunakawa et al.
patent: 6420198 (2002-07-01), Kimura et al.
patent: 6627974 (2003-09-01), Kozaki et al.
patent: 20020090816 (2002-07-01), Ashby et al.
patent: 20020115267 (2002-08-01), Tomiya et al.
patent: 20020117104 (2002-08-01), Hata et al.
patent: 57-500670 (1982-04-01), None
patent: 10-321911 (1998-12-01), None
patent: 11-329971 (1999-11-01), None
patent: 11-329971 (1999-11-01), None
patent: 2001-189531 (2001-07-01), None
patent: WO 8102948 (1981-10-01), None
patent: 9965068 (1999-12-01), None
patent: 0004615 (2000-01-01), None
Nakamura et al, “High-Power, Long-Lifetime InGaN/GaN/AIGaN-Based Layer Diodes Grown on Pure GaN Substrates”. Jpn. J. Appl. Phys., vol. 37. 1998, pp. L309-L312.
Nakamura et al, “InGaNGaN/GaN-based Laser Diodes with Cleaved Facets Grown on GaN Subrates”, Applied Physics Letters, vol. 73, No. 6, 1998, pp. 832-834.
Nakamura, “InGaN Multiquantum-Well-Structure Laser Diodes with GaN-AIGaN Modulation-Doped Strained-Layer Superlattices”, IEEE Journal of Selected Topics in Quantum Electronics. vol. 4, No. 3, 1998, pp. 483-489.
Mukai et al., “Ultraviolet InGaN and GaN Single-Quantum-Well-Structure Light-Emitting Diodes Grown on Epitaxially Latterally Overgrown GaN Substrates”, Jpn. Appl. Phys., vol. 38, 1999, pp. 5735-5739.
Nakamura, “Blue Light Emitting Laser Diodes”, Thin Solid Films, 343-344, 1999, pp. 345-349.
Mukai et al, “InGaN-Based Blue Light-Emitting diodes Grown on Epitaxially Latterally Overgrown GaN Substrates”, Jpn. J. Appl. Phys., vol. 37, 1998, pp. L839-L841.
Nakamura et al, “InGaN/GaN/GaN-Based Laser Diodes with Modulation-Doped Strained-Layer Superlattices grown on an Epitaxially Laterally Overgrown GaN Substrate”, Appl. Phys. Lett. 72(2), 1998, pp. 211-213.
International Search Report mailed Jul. 18, 2002.
Zheleva et al, “Pendeo-epitaxy—A New Approach for Lateral Growth of Gallium Nitride Structures”, MRS Internet Journal Of Nitride Semiconductor Research, Material Research Society, Warrendale, PA, US, vol. 4S1, Nov. 30, 1998. XP002117241.
Nakamura, “INGAN multiquantum-Well-Structure Laser Diodes with GAN-ALGAN Modulation-Doped Strained-Layer Superlatticies”, IEEE Journal of Selected Topics in Quantum Electronics, IEEE Service Center, U.S., vol. 4. No. 3. May 1, 1998, pp. 483-489. XP000782257.
Office Action mailed Jan. 3, 2003 in corresponding divisional application Ser. No. 10/260,442.
Chocho Kazuyuki
Kiyoku Hiroyuki
Kozaki Tokuya
Maegawa Hitoshi
Kang Donghee
Nichia Corporation
Nixon & Vanderhye PC
LandOfFree
Nitride semiconductor substrate and method for manufacturing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nitride semiconductor substrate and method for manufacturing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nitride semiconductor substrate and method for manufacturing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3436000