Nitride semiconductor element and production method for...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal

Reexamination Certificate

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C438S044000, C438S047000, C257S295000, C257S190000

Reexamination Certificate

active

06818465

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a nitride semiconductor device having a function such as light emission, which includes a nitride based semiconductor crystal layer formed by crystal growth and an electrode layer formed on the crystal layer, and a fabrication method thereof, and particularly to a nitride semiconductor device capable of realizing efficient current injection and a fabrication method thereof.
Nitride based III-V compound semiconductors such as GaN, AlGaN, and GaInN, each of which has a forbidden band width ranging from 1.8 eV to 6.2 eV, become a focus of attention in theoretically realizing light emitting devices allowing emission of light in a wide range from red light to ultraviolet right.
In fabrication of light emitting diodes (LEDs) and semiconductor lasers by using nitride based III-V compound semiconductors, it is required to form a stacked structure of layers made from GaN, AlGaN, GaInN and the like, wherein a light emitting layer (active layer) is held between an n-type cladding layer and a p-type cladding layer. As one example, there is known a light emitting diode or a semiconductor laser including a light emitting layer having a GaInN/GaN quantum-well structure or a GaInN/AlGaN quantum-well structure.
A vapor-phase growth technique for a nitride semiconductor such as a gallium nitride based compound semiconductor has an inconvenience that there is no substrate allowed to be lattice matched with a nitride semiconductor or a substrate having a low density of dislocations. To cope with such an inconvenience, there has been known a technique of depositing a low temperature buffer layer made from AlN or Al
x
Ga
1-x
N (0≦x<1) at a low temperature of 900° C. or less on a surface of a substrate made from sapphire or the like, and then growing a gallium nitride based compound semiconductor thereon, thereby reducing dislocations due to lattice mismatching between the substrate and the compound semiconductor. Such a technique has been disclosed, for example, in Japanese Patent Laid-open No. Sho 63-188938 and Japanese Patent Publication No. Hei 8-8217. By using such a technique, it is possible to improve the crystallinity and morphology of a gallium nitride based compound semiconductor.
Another technique of obtaining high quality crystal at a low density of dislocations has been disclosed, for example, in Japanese Patent Laid-open Nos. Hei 10-312971 and Hei 11-251253. This method involves depositing a first gallium nitride based compound semiconductor layer, forming a protective film made from a material capable of inhibiting growth of a gallium nitride based compound semiconductor, such as silicon oxide or silicon nitride, and growing a second gallium nitride based compound semiconductor in an in-plane direction (lateral direction) from regions, not covered with the protective film, of the first gallium nitride based compound nitride layer, thereby preventing propagation of threading dislocations extending in the direction perpendicular to the interface of the substrate. A further technique of reducing a density of threading dislocations has been disclosed, for example, in a document (MRS Internet J. Nitride Semicond. Res. 4S1, G3. 38 (1999), or Journal of Crystal Growth 189/190 (1998) 83-86). This method involves growing a first gallium nitride based compound semiconductor, selectively removing the thus formed semiconductor film by using a reactive ion etching (hereinafter, referred to as “RIE”) system, and selectively growing a second gallium nitride based compound semiconductor from the remaining crystal in the growth apparatus, thereby reducing the density of threading dislocations. By using these techniques, it is possible to obtain a crystal film having a density of dislocations, which is reduced to about 10
6
/cm
−2
, and hence to realize a high life semiconductor laser using the crystal film.
The selective growth is useful not only for reducing threading dislocations as described above but also for producing a semiconductor device having a three-dimensional structure. For example, a semiconductor device having a three-dimensional structure can be obtained by forming an anti-growth film on a gallium nitride based compound semiconductor film or a substrate, and selectively growing crystal from an opening portion formed in the anti-growth film, or by selectively removing a gallium nitride based compound semiconductor film or a substrate, and selectively growing from the remaining crystal. Such a semiconductor device has a three-dimensional structure having a facet composed of side planes and a top (upper surface) at which the side planes cross each other, and is advantageous in reducing a damage in the device isolation step, easily forming a current constriction structure of a laser, or improving the crystallinity by positively using characteristics of crystal planes forming the facet.
FIG. 30
is a sectional view showing one example of a nitride based light emitting device grown to a three-dimensional shape by selective growth, wherein the light emitting device is configured as a GaN based light emitting diode. An n-type GaN layer
331
is formed as an underlying growth layer on a sapphire substrate
330
. A silicon oxide film
332
having an opening portion
333
is formed on the n-type GaN layer
331
so as to cover the n-type GaN layer
331
. A hexagonal pyramid shaped GaN layer
334
is formed by selective growth from the opening portion
333
opened in the silicon oxide film
332
.
If the principal plane of the sapphire substrate
330
is the C-plane, the GaN layer
334
becomes a pyramid shaped growth layer covered with the S-planes ({1,−1,0,1} planes). The GaN layer
334
is doped with silicon. The tilted S-plane portion of the GaN layer
334
functions as a cladding portion. An InGaN layer
335
is formed as an active layer so as to cover the tilted S-planes of the GaN layer
334
, and an AlGaN layer
336
and a GaN layer
337
doped with magnesium are formed on the outside of the InGaN layer
335
.
A p-electrode
338
and an n-electrode
339
are formed on such a light emitting diode. The p-electrode
338
is formed on the GaN layer
337
doped with magnesium by vapor-depositing a metal material such as Ni/Pt/Au or Ni(Pd)/Pt/Au. The n-electrode
339
is formed in an opening portion opened in the silicon oxide film
332
by vapor-depositing a metal material such as Ti/Al/Pt/Au.
FIG. 31
is a sectional view showing one example of a related art nitride based light emitting device grown into a three-dimensional shape by selective growth. Like the nitride semiconductor light emitting device shown in
FIG. 30
, an n-type GaN layer
351
is formed as an underlying growth layer on a sapphire substrate
350
. A silicon oxide film
352
having an opening portion
353
is formed on the n-type GaN layer
351
so as to cover the n-type GaN layer
351
. A hexagonal column shaped GaN layer
354
having a rectangular shape in cross-section is formed by selective growth from the opening portion
353
opened in the silicon oxide film
352
.
The GaN layer is a region doped with silicon, and is grown to a growth layer having side planes composed of the {1,−1,0,0} planes by adjusting a growth condition for selective growth. An InGaN layer
355
is formed as an active layer so as to cover the GaN layer
354
. A p-type AlGaN layer
356
and a p-type GaN layer
357
doped with magnesium are formed on the outer side of the InGaN layer
355
.
A p-electrode
358
and an n-electrode
359
are formed on such a light emitting diode. The p-electrode
358
is formed on the GaN layer
357
doped with magnesium by vapor-depositing a metal material such as Ni/Pt/Au or Ni(Pd)/Pt/Au. The n-electrode
359
is formed in an opening portion opened in the silicon oxide film
352
by vapor-depositing a metal material such as Ti/Al/Pt/Au.
In the case of using such selective growth, however, there may occur an inconvenience that since the top or the upper surface is surrounded by the facet composed of the side planes lo

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