Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1993-04-14
1994-06-28
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257640, 257408, 257900, 257649, 257413, H01L 2968, H01L 2978
Patent
active
053249747
ABSTRACT:
A method is described for fabricating a lightly doped drain MOSFET integrated circuit device. The method begins by forming a pattern of gate electrode structures upon a semiconductor substrate which structures each includes a gate oxide, a polysilicon layer and a refractory metal silicide. A thin silicon nitride layer is formed over each of the structures and the exposed surfaces therebetween of the substrate. A pattern of lightly doped regions in the substrate is formed by ion implantation using the polycide gate structures as the mask. A dielectric spacer structure is formed upon the sidewalls of each of the polycide gate structures and over the adjacent portions of the substrate. A pattern of heavily doped regions in the substrate is formed by ion implantation using the polycide structures with spacer structures as the mask to produce the lightly doped drain source/drain structures of an MOSFET device. The integrated circuit device is completed by forming a passivation layer over the structures described and appropriate electrical connecting structures thereover to electrically connect the gate electrode structures and source/drain elements.
REFERENCES:
patent: 4690730 (1987-09-01), Tang et al.
patent: 4935380 (1990-06-01), Okumura
patent: 5030585 (1991-07-01), Gonzalez et al.
Crane Sara W.
Guay John F.
Industrial Technology Research Institute
Saile George D.
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