Networking device and method for making cyclic redundancy...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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Reexamination Certificate

active

06609226

ABSTRACT:

BACKGROUND
1. Field
The present invention relates to the field of data communications. In particular, this invention relates to a networking device and method for maintaining error detection functionality in the presence of error duplication.
2. General Background
Over the last few years, self-synchronous scramblers have been used in various types of networks in efforts to improve the security of data being transferred between a source and a destination. Currently, self-synchronous scramblers may be used in a synchronous optical network (e.g., Point-to-Point “PPP” over Synchronous Digital Hierarchy “SDH”/Synchronous Optical Network “SONET”), in an Asynchronous Transfer Mode (ATM) based network, or even in an Ethernet network. A scrambler is considered to be “self-synchronous” when the scrambled data transferred to the destination includes the state of the scrambler.
At the destination, a descrambler receives the scrambled data and attempts to recover the original, descrambled data. Unfortunately, in the recovery process, a descrambler duplicates the received bit errors. In certain situations, this may adversely effect error detection capabilities such as the reliability of Ethernet cyclic redundancy check (CRC) operations for example. An Ethernet CRC can detect 1-, 2-, or 3-bit errors for any burst error with a length up to thirty-two (32) bits. However, due to error duplication by the descrambler, the burst error may greatly exceed 32 bits.
Although it has been shown that the reduction in the error detection capability of the Ethernet CRC is negligible for random errors, the error duplication of the descrambler causes certain normally detectable errors to become undetectable and vice versa. For example, as shown in
FIG. 1
, “E(x)”
100
is a polynomial representation of the error on the received bit stream before descrambling, “T(x)”
110
is a polynomial representation of a transmitted message, “E′(x)”
120
is a polynomial representation of the duplication of the error E(x), and “D(x)”
130
is a polynomial representation of the error, E(x)+E′(x), realized at the destination after descrambling. As shown, for a first boundary error condition, bit errors
140
occurring outside T(x)
110
are now duplicated inside T(x)
110
. Likewise, for a second boundary error condition, bit errors occurring inside T(x)
150
are duplicated and now are partially outside T(x)
110
. Thus, error detection in the presence of the scrambler may become less reliable. Of course, when D(x)
130
is entirely contained in T(x)
110
, the error detection capabilities of CRC are not comprised when the CRC and the scrambler polynomials have no factors in common.
SUMMARY
The present invention relates to a networking device and method for transparently modifying a cyclic redundancy check (CRC) of a message so that higher layers (e.g., data link layer and above) can detect error duplication caused by scrambling and descrambling. No increase in the size of the messaging is needed so that the invention may be used for current and future technologies. In one embodiment, the networking device comprises logic employed within a physical layer of the device. This logic, referred to as a scrambler, modifies an original cyclic redundancy check (CRC) value associated with a message. This enables detection of a duplication of bit errors at a targeted destination of the message.


REFERENCES:
patent: 5321754 (1994-06-01), Fisher et al.
patent: 5703882 (1997-12-01), Jung et al.
patent: 5923680 (1999-07-01), Brueckheimer et al.
patent: 6002675 (1999-12-01), Ben-Michael et al.
patent: 6061449 (2000-05-01), Candelore et al.
patent: 6349138 (2002-02-01), Doshi et al.
Dravida, “Eror Conrol Aspects of High Speed Networks”, INFOCOM '92, 1992, pp. 272-281.

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