Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-03-10
2010-11-02
Lane, Jack A (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S209000, C711S221000
Reexamination Certificate
active
07827382
ABSTRACT:
Storage network arrangements effecting a method including: acquiring information on the real volumes, and port information on the physical devices in which the real volumes reside; creating virtual volumes being linked to the real volumes, based on the information on the real volumes; forming one or more virtual volume groups by combining the virtual volumes, based on the port information, in such a way that the virtual volumes and the virtual volume groups in which the virtual volumes reside have a virtual-volume-to-virtual-volume-group configuration which is identical to a real-volume-to-physical-device configuration of the real volumes and the physical devices in which the real volumes reside; and establishing the created virtual volume groups in the upper storage apparatus.
REFERENCES:
patent: 7143262 (2006-11-01), Serizawa
patent: 7206860 (2007-04-01), Murakami et al.
patent: 2004/0260861 (2004-12-01), Serizawa et al.
patent: 2005/0120172 (2005-06-01), Ozaki et al.
patent: 2006/0195676 (2006-08-01), Honda et al.
patent: 2004-178253 (2004-06-01), None
Ishizaki Takeshi
Mizuno Jun
Yamamoto Masayuki
Antonelli, Terry Stout & Kraus, LLP.
Hitachi , Ltd.
Lane Jack A
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