Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol
Reexamination Certificate
2006-10-31
2008-09-02
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Protocol
C711S108000, C370S390000
Reexamination Certificate
active
07421528
ABSTRACT:
A method for address filtering is described. A host interface including device registers is provided. A user program is initiated for loading of data and control information respectively into a first data register and a control register of the device registers. Responsive to the loading, hardware is initiated for writing of information loaded into the first data register into a host interface register, where the first data register is associated with an address table configuration entry and the information includes read or write information and address information. Responsive to the read or write information and the address information, a multicast address is obtained from storage; a first portion of the multicast address is deposited into the first data register; and a second portion of the multicast address is deposited into a second data register.
REFERENCES:
patent: 5414704 (1995-05-01), Spinney
patent: 5530703 (1996-06-01), Liu et al.
patent: 5651002 (1997-07-01), Van Seters et al.
patent: 5754540 (1998-05-01), Liu et al.
patent: 5784573 (1998-07-01), Szczepanek et al.
patent: 5835746 (1998-11-01), Girardeau et al.
patent: 5914616 (1999-06-01), Young et al.
patent: 5920698 (1999-07-01), Ben-Michael et al.
patent: 5983275 (1999-11-01), Ecclesine
patent: 5991303 (1999-11-01), Mills
patent: 6108726 (2000-08-01), Runaldue et al.
patent: 6373841 (2002-04-01), Goh et al.
patent: 6411616 (2002-06-01), Donahue et al.
patent: 6442170 (2002-08-01), Perlman et al.
patent: 6504842 (2003-01-01), Bergenfeld
patent: 6604206 (2003-08-01), Chadha et al.
patent: 6606317 (2003-08-01), Beadle et al.
patent: 6617877 (2003-09-01), Cory et al.
patent: 6704296 (2004-03-01), Crayford et al.
patent: 6707814 (2004-03-01), Ohgane
patent: 6718491 (2004-04-01), Walker et al.
patent: 6754211 (2004-06-01), Brown
patent: 6775287 (2004-08-01), Fukano et al.
patent: 6778532 (2004-08-01), Akahane et al.
patent: 6879272 (2005-04-01), Stenfort
patent: 6879598 (2005-04-01), Zancan et al.
patent: 6891397 (2005-05-01), Brebner
patent: 6909713 (2005-06-01), Magnussen et al.
patent: 6911840 (2005-06-01), Milne et al.
patent: 6937608 (2005-08-01), Deng
patent: 6957283 (2005-10-01), Dhir et al.
patent: 6959007 (2005-10-01), Vogel et al.
patent: 6976160 (2005-12-01), Yin et al.
patent: 7020729 (2006-03-01), Taborek et al.
patent: 7024489 (2006-04-01), Aviles
patent: 7042893 (2006-05-01), Lo et al.
patent: 7042899 (2006-05-01), Vaida et al.
patent: 7065095 (2006-06-01), Coden
patent: 7091890 (2006-08-01), Sasaki et al.
patent: 7143218 (2006-11-01), Yin et al.
patent: 7146451 (2006-12-01), Boily
patent: 2002/0188875 (2002-12-01), Hwang et al.
patent: 2003/0023762 (2003-01-01), Dhir et al.
patent: 2003/0055900 (2003-03-01), Glas et al.
patent: 2003/0061341 (2003-03-01), Loh et al.
patent: 2003/0081606 (2003-05-01), Tamura et al.
patent: 2003/0084195 (2003-05-01), Dove
patent: 2003/0110306 (2003-06-01), Bailis et al.
patent: 2003/0198224 (2003-10-01), Lee et al.
patent: 2003/0227928 (2003-12-01), Hsu et al.
patent: 2004/0001435 (2004-01-01), Wong
patent: 2004/0004239 (2004-01-01), Madurawe
patent: 2004/0004974 (2004-01-01), Gaspar
patent: 2004/0062136 (2004-04-01), Partsch et al.
patent: 2004/0062267 (2004-04-01), Minami et al.
patent: 2004/0100962 (2004-05-01), Kim et al.
patent: 2004/0123173 (2004-06-01), Emberling et al.
patent: 2004/0183564 (2004-09-01), Schadt et al.
patent: 2004/0193852 (2004-09-01), Johnson
patent: 2005/0025080 (2005-02-01), Liu
patent: 2005/0216726 (2005-09-01), Dellmo et al.
patent: 2005/0256969 (2005-11-01), Yancey et al.
patent: 2006/0146914 (2006-07-01), Horvath et al.
Xilinx, Inc.; DS200; Product Specification; “1-Gigabit Ethernet MAC Core with PCS/PMA Sublayers (1000BASE-X) or GMII v4.0”; Dec. 11, 2003; pp. 1-54, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 10/985,493, filed Nov. 10, 2004, Kao Ting Yun et al., “An Embedded Network Media Access Controller”, 188 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/041,125, filed Jan. 21, 2005, Kao, Ting Yun et al., “Ethernet Media Access Controller Embedded in a Programmable Logic Device—Clock Interface”, 183 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/040,973, filed Jan. 21, 2005, Yin, Robert et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Host Interface”, 185 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/040,248, filed Jan. 21, 2005, Yin, Robert et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Transmit-Side Client Interface”, 181 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/041,126, filed Jan. 21, 2005, Yin, Robert et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Receive-Side Client Interface”, 181 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/040,568, filed Jan. 21, 2005, Kao, Ting Yun et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Physical Layer Interface”, 178 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/040,567, filed Jan. 21, 2005, Yin, Robert et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Statistics Interface”, 180 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
U.S. Appl. No. 11/040,136, filed Jan. 21, 2005, Yin, Robert et al., “Network Media Access Controller Embedded in a Programmable Logic Device—Host Interface Control Generator”, 180 pages, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
Xilinx, Inc.; “1-Gigabit Ethernet MAC Core with PCS/PMA Sublayers (1000BASE-X) or GMII v4.0”; available from Xilinx, Inc. [online] (Aug. 25, 2004) <URL:http://www.xilinx.com/ipcenter/catalog/logicore/docs/gig—eth—mac. pdf>.
Xilinx, Inc.; “Programmable Logic Data Book 2000”, Apr. 2000; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 3-75 through 3-96.
Xilinx, Inc.; “Virtex II Pro Platform FPGA Handbook”; Oct. 14, 2002; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 19-71.
Xilinx, Inc.; “Virtex II Pro Platform FPGA Handbook”; Dec. 2000; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 33-75.
U.S. Appl. No. 10/919,901, filed Aug. 17, 2004, Sasaki et al.
U.S. Appl. No. 10/985,493, filed Nov. 10, 2004, Kao et al.
U.S. Appl. No. 11/040,135, filed Jan. 21, 2005, Yin et al.
U.S. Appl. No. 11/040,136, filed Jan. 21, 2005, Yin et al.
U.S. Appl. No. 11/040,248, filed Jan. 21, 2005, Yin et al.
U.S. Appl. No. 11/040,567, filed Jan. 21, 2005, Yin et al.
U.S. Appl. No. 11/040,568, filed Jan. 21, 2005, Kao et al.
U.S. Appl. No. 11/040,973, filed Jan. 21, 2005, Yin et al.
U.S. Appl. No. 11/041,125, filed Jan. 21, 2005, Kao et al.
U.S. Appl. No. 11/041,126, filed Jan. 21, 2005, Yin et al.
Xilinx, Inc., “1-Gigabit Ethernet MAC Core with PCS/PMA Sublayers (1000BASE-X) or GMII v4.0,” Dec. 11, 2003, pp. 1-54, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
Xilinx, Inc., “Programmable Logic Data Book 2000,” Dec. 11, 2002, pp. 3-75 to 3-96, avaiable from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
Xilinx, Inc., “Virtex II Pro Platfrom FPGA Handbook,” Oct. 14, 2002, pp. 19-71, available from Xilinx, In., 2100 Logic Drive, San Jose, CA 95124.
Xilinx, Inc., “Virtex II Pro Platfrom FPGA Handbook,” Dec. 2000, pp. 33-75, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
Burnley Richard P.
Fallside Hamish T.
Grant Douglas M.
McKay Nicholas
Rhodes Martin B.
Auve Glenn A.
Vu Trisha
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