Network interface with double date rate and delay locked loop

Details Network interface with double date rate and delay locked loop Network interface with double date rate and delay locked loop

2007-12-11

2007-12-11

Trujillo, James K. (Department: 2116)

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

Reexamination Certificate

active

11580956

ABSTRACT:
A network device is provided which includes a device input, at least one port, a frequency doubler, a data I/O device, and a programmable delay locked loop. The frequency doubler is coupled to the input and configured to receive an input signal and output an output signal having double the frequency of the input signal. The data I/O device is configured to output data based upon a reference clock signal. The programmable delay locked loop is coupled to the device input and configured to receive an input signal and to automatically output an output signal being a predetermined amount out of phase from the input signal. An external clock signal received at the device input is input to the frequency doubler. The output of the frequency doubler is input to the data I/O device as a reference clock. Data (e.g., from internal device logic) is output from the data I/O device to the at least one port. The external clock signal is input to the programmable delay locked loop, which outputs an output clock signal having a frequency equal to the frequency of the external clock signal, in synchronization with the data being output.

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