Network interface speed adjustment to accommodate high...

Details Network interface speed adjustment to accommodate high... Network interface speed adjustment to accommodate high...

2006-12-14

2009-10-13

Elamin, Abdelmoniem (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

C713S310000, C713S320000, C713S321000, C713S322000, C713S323000, C713S324000, C713S330000, C713S340000, C370S232000, C370S252000, C709S233000, C709S249000, C709S250000

Reexamination Certificate

active

07603574

ABSTRACT:
A system is coupled to a network by a network interface. In a power savings mode the speed setting of the network interface is reduced to accommodate increased system latency.

REFERENCES:
patent: 6463542 (2002-10-01), Yu et al.
patent: 7127521 (2006-10-01), Hsu et al.
patent: 7327754 (2008-02-01), Mills et al.
patent: 2003/0191854 (2003-10-01), Hsu et al.
Evers, Maris, Low Power AMD Athlon™ 64 and AMD Opteron™ Processors, Hot Chips 2004, pp. 1-15.

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