Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Patent
1998-06-17
2000-07-25
Pan, Daniel H.
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
370232, 370253, 710 52, G06F 1340, G06F 1320
Patent
active
06094692&
ABSTRACT:
A network interface transmits data packets between a host computer and a network and includes a first in first out (FIFO) buffer memory with an adaptive transmit start point determined for each data packet. The network interface received data packets from the host computer via a peripheral component interconnect (PCI). A FIFO control determines the byte length of each data packet, measures the minimum fill time indicating the time necessary to fill the FIFO buffer memory with a predetermined minimum amount of data necessary before transmission by the FIFO buffer memory, and calculates the time to fill the FIFO buffer memory with each packet based on the determined length and the measured minimum fill time. The time to empty the packet from the FIFO buffer memory is also calculated based upon the length of the packet and predetermined network transmission rates. If the time to empty the packet from the FIFO buffer memory is greater than or equal to the time to fill the FIFO buffer memory, the transmit start point is set to the predetermined minimum amount, otherwise the transmit start point is adjusted in accordance with the difference in time between filling and emptying the FIFO buffer memory with the packet, a FIFO fill rate based on the measured minimum fill time, and a coefficient that accounts for latencies in the PCI bus. The network interface thus provides an optimal transmit start point for each data packet, minimizing latency and underflow conditions during network transmission.
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Advanced Micro Devices , Inc.
Pan Daniel H.
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