Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-31
2007-07-31
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
10944880
ABSTRACT:
It is intended to provide net list creating method, net list creating device, and computer program thereof capable of creating net list of memory space by selecting optimum combination of memory macros and providing a control circuit for controlling and making the combination accessible as memory space from a previously registered library so as to realize required memory space. For realizing a target memory with a single memory macro by extending its word width, processing goes on to as follows: target word width of a target memory is larger than maximum macro word width of a memory macro (S5: YES); first word width ratio (WR1), target word width to maximum macro word width, is 2nand first bit width ratio (BR1), bit width of a target memory to bit width of memory macro which has maximum macro word width, is 2(−n)or smaller (S9: YES); a memory macro which has maximum macro word width is selected (S11); and a control circuit is selected from a control library (D3) previously provided after branch a.
REFERENCES:
patent: 5978304 (1999-11-01), Crafts
patent: 6539506 (2003-03-01), Lammers et al.
patent: 6856167 (2005-02-01), Ozguz et al.
patent: 2003/0223295 (2003-12-01), Ozguz et al.
Fujitsu Limited
Lin Sun James
Staas & Halsey
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