Nested voltage island architecture

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S030000

Reexamination Certificate

active

07131074

ABSTRACT:
An integrated circuit. The integrated circuit includes a parent terrain; and a hierarchical order of nested voltage islands within the parent terrain, each higher-order voltage island nested within a lower-order voltage island, each nested voltage island having the same hierarchical structure.

REFERENCES:
patent: 6480989 (2002-11-01), Chan et al.
patent: 6581201 (2003-06-01), Cano et al.
patent: 6584596 (2003-06-01), Buffet et al.
patent: 6615395 (2003-09-01), Hathaway et al.
patent: 6631502 (2003-10-01), Buffet et al.
patent: 6711071 (2004-03-01), Mizuno et al.
patent: 6820240 (2004-11-01), Bednar et al.
patent: 6937496 (2005-08-01), Mizuno et al.
patent: 2004/0060023 (2004-03-01), Bednar et al.
Bednar et al (IEEE Managing Power and Performance for System-on-Chip Designs using Voltage Islands 2002).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Nested voltage island architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Nested voltage island architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nested voltage island architecture will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3654491

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.