Neo-wafer device and method

Details Neo-wafer device and method Neo-wafer device and method

2003-11-06

2008-08-26

Picardat, Kevin M (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S782000

Reexamination Certificate

active

07417323

ABSTRACT:
A neo-wafer made from integrated circuit die and methods for making a neo-wafer are disclosed. A substrate is provided and includes a dielectric layer with conductive pads for the receiving of one or more integrated circuit die. Die are flip-chip bonded to the conductive pads and all voids under-filled. The neo-wafer is thinned to expose the conductive pads, creating a neo-wafer from which stackable neo-layers with known good die can be singulated.

REFERENCES:
patent: 6365441 (2002-04-01), Raiser et al.
patent: 6660565 (2003-12-01), Briar
patent: 6670223 (2003-12-01), Gaynes et al.
patent: 6673653 (2004-01-01), Pierce
patent: 6919224 (2005-07-01), Sane et al.

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