Negatively charged wordline for reduced subthreshold current

Details Negatively charged wordline for reduced subthreshold current Negatively charged wordline for reduced subthreshold current

2005-03-08

2005-03-08

Ho, Hoai (Department: 2818)

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

C365S154000, C365S189090, C365S230050

Reexamination Certificate

active

06865119

ABSTRACT:
An invention is provided for reducing subthreshold current in memory core cells. A memory array having a plurality of memory core cells is provided. Each memory core cell in the memory array is selectable using a word line. A selected word line addressing a particular memory core cell is charged to a positive voltage. In addition, unselected wordlines of the memory array are charged to a negative voltage. In this manner, subthreshold current associated with unselected memory core cells is reduced.

REFERENCES:
patent: 6046956 (2000-04-01), Yabe
patent: 6049495 (2000-04-01), Hsu et al.
patent: 6097665 (2000-08-01), Tomishima et al.
patent: 6611451 (2003-08-01), Houston
patent: 20010053093 (2001-12-01), Ogura et al.

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