Negative voltage charge pump particularly for flash EEPROM memor

Details Negative voltage charge pump particularly for flash EEPROM memor Negative voltage charge pump particularly for flash EEPROM memor

1997-12-19

1999-11-30

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327537, 363 60, G05F 110

Patent

active

059949490

ABSTRACT:
A voltage multiplier has two mirrored sections which are clocked by nonoverlapping phases. Each section of the voltage multiplier has N stages: each stage is made of a capacitor and MOS transistors operating as switches. During a charging phase, the N capacitors are insulated from each other and the terminals of each capacitor are connected one to voltage Vpp and the other to ground GND by means of PMOS transistors. During the discharge phase, the N capacitors are connected in series, with the bottom plate of the first stage capacitor coupled to ground voltage GND and the top plate of the last-but-one stage capacitor coupled to the output through a PMOS transistor. The gate voltage of this PMOS transistor is furnished by the last stage, in the upper portion of the circuit, in order to drive the transistor into a fully on condition.

REFERENCES:
patent: 5301097 (1994-04-01), McDaniel
patent: 5748032 (1998-05-01), Baek
patent: 5754476 (1998-05-01), Caser et al.
patent: 5856918 (1999-01-01), Soneda et al.

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