Negative bias temperature instability modeling

Details Negative bias temperature instability modeling Negative bias temperature instability modeling

2007-06-05

2007-06-05

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

11061581

ABSTRACT:
A method for accounting for negative bias temperature instability in a rise delay of a circuit design, the method comprising the steps of create a cell and net model library with original rise numbers, construct the circuit design from the cell and net models, for each cell and net in the circuit design, calculate an original rise delay, apply a negative bias temperature instability model to determine a parameter shift, determine a new rise number from the parameter shift, and calculate a new rise delay by original rise delay* (original rise number)/(new rise number).

REFERENCES:
patent: 2003/0042926 (2003-03-01), Rost et al.

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