Nearest neighbor dither image processing circuit

Details Nearest neighbor dither image processing circuit Nearest neighbor dither image processing circuit

1991-02-25

1993-08-24

Moore, David K.

Image analysis

Histogram processing

For setting a threshold

382 14, 358457, 395 22, 395 24, G06K 962

Patent

active

052395979

ABSTRACT:
A conversion circuit of binary dither image to multilevel image comprises a counter utilizing concepts of a neural network, an 8 bit register and 8 OR gates, resulting in high speed of operation. The counter uses a neural network based on the Hopfield model and is made up of an input synapse group, a first bias synapse group, a feedback synapse group, a second bias synapse group, a neuron group and an invertor group.

REFERENCES:
patent: 4783838 (1988-11-01), Matsunawa
patent: 4829587 (1989-05-01), Glazer et al.
patent: 4926268 (1990-05-01), Kawamura et al.
patent: 4933776 (1990-06-01), Ikeda

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