Natural analog or multilevel transistor DRAM-cell

Details Natural analog or multilevel transistor DRAM-cell Natural analog or multilevel transistor DRAM-cell

2007-12-11

2007-12-11

Pham, Ly Duy (Department: 2827)

Static information storage and retrieval

Systems using particular element

Semiconductive

C365S072000, C365S189011, C711S105000

Reexamination Certificate

active

11258991

ABSTRACT:
Circuits and methods to design and to fabricate said circuits to accomplish a two-level DRAM cell or a multilevel DRAM cell using a natural transistor have been achieved. The usage of a natural transistor, having a threshold voltage of close to zero, as a pass transistor reduces the amount of current required for a read operation significantly. The usage of a natural transistor in a multi-level DRAM is enabling to implement easily a high number of voltage levels, and thus more information, in one DRAM cell and is reducing the amount of output current required as well. The fabrication of said DRAM cells in an integrated circuit, comprising a natural transistor and standard transistors, include masking of the natural transistor during the ion implantation to avoid impurities increasing the threshold voltage.

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