Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-04-11
2006-04-11
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
07028143
ABSTRACT:
A method for transferring data, between a first device and second device in a core processor including a data cache, comprising the steps of, when said first device supports wide data transfer, and said transfer of data comprises a data write operation from said first device to said second device, writing said data to the second device without writing the data to said data cache.
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Bailey Neil
Barlow Stephen
Plowman David
Ramsdale Timothy
Swann Robert
Ellis Kevin L.
McAndrews Held & Malloy Ltd.
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