Narrow radius tips for high voltage semiconductor devices with i

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257341, 257343, H01L 2980, H01L 29520, H01L 29784

Patent

active

052586367

ABSTRACT:
A field effect transistor (FET), according to the present invention, comprises a source and drain pair of electrodes having non-uniform charge distributions between them, such as results from small radius tips, and has a gate and channel structure that exists only between points of the source and drain pair that have the less intense charge distributions, e.g., areas not involving any small radius tips. The gate and channel structure is such that, given the non-uniform charge distributions between the source and drain pair of electrodes, the electric field is reduced around the tip by eliminating the n-well junction near the source-drain fingertips.

REFERENCES:
patent: 4462041 (1984-07-01), Glenn
patent: 4811075 (1989-03-01), Eklund
patent: 4894694 (1990-01-01), Cham et al.
patent: 5025296 (1991-06-01), Fullerton et al.
patent: 5040045 (1991-08-01), McArthur
patent: 5068700 (1991-11-01), Yamaguchi et al.
M. Amato, "Reduced Electric Field Crowding at the Fingertips of Lateral DMOS Transistors," Proceedings of the Electrochemical Society Meeting, May 1989, pp. 161-162.
Hamza Yilmaz, "Modeling and Optimizing of Lateral High Voltage IC Devices to Minimize 3-D Effects," Proceedings of the Electrochemical Society Meeting, May 1989, pp. 155-156.

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