Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-01-19
2008-09-09
Ho, Tu-Tu V (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S349000, C257SE29129, C257SE27112
Reexamination Certificate
active
07423313
ABSTRACT:
According to this invention, there is provided a NAND-type semiconductor storage device including a semiconductor substrate, a semiconductor layer formed on the semiconductor substrate, a buried insulating film selectively formed between the semiconductor substrate and the semiconductor layer in a memory transistor formation region, diffusion layers formed on the semiconductor layer in the memory transistor formation region, floating body regions between the diffusion layers, a first insulating film formed on each of the floating body regions, a floating gate electrode formed on the first insulating film, a control electrode on a second insulating film formed on the floating gate electrode, and contact plugs connected to ones of the pairs of diffusion layers which are respectively located at ends of the memory transistor formation region, wherein the ones of the pairs of diffusion layers, which are located at the ends of the memory transistor formation region, are connected to the semiconductor substrate below the contact plugs.
REFERENCES:
patent: 6787853 (2004-09-01), Hidaka et al.
patent: 11-163303 (1999-06-01), None
patent: 2000-174241 (2000-06-01), None
patent: 2005-303305 (2005-10-01), None
Yeo et al., 80 nm 512M DRAM with Enhanced Data Retention Time Using Partially-Insulated Cell Array Transistor (PiCAT), 2004 Symposium on VLSI Technology, Digest of Technical Papers, pp. 30-31, (2004).
Hamamoto Takeshi
Nitayama Akihiro
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Ho Tu-Tu V
Kabushiki Kaisha Toshiba
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