NAND-type dynamic RAM having temporary storage register and sens

Static information storage and retrieval – Read/write circuit – Data refresh

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365149, 365205, G11C 700

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active

056256027

ABSTRACT:
A sense amplifier is connected between memory cell arrays, a re-writing register is arranged in position adjacent to the sense amplifier, transfer gates are disposed between the sense amplifier and the memory cell arrays, transfer gates are provided between bit lines of the memory cell arrays and global bit lines, and a gate control circuit for controlling the transfer gates is provided. When readout data is written into the register, the node of the sense amplifier is electrically separated from the bit lines and global bit lines.

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