Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-01-10
1997-06-03
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257330, 257401, 365104, H01L 2978
Patent
active
056357486
ABSTRACT:
A NAND ROM with an improved integration level is described. A number of trenches are formed in stripe pattern at the surface of a semiconductor substrate, and an insulating film for isolation between devices is formed at the sidewalls, respectively, of each trench. A first unit array consisting of MOSFETs connected in series is arranged in each first active region defined between two adjacent trenches. A second active region is defined in the bottom of each trench and a second unit array is arranged therein. Distinguished from the trench isolation technique which provides trenches between unit arrays, instead, according to the present invention, sidewalls of insulating film are formed. The trench width is limited to the minimum feature size involving the lithography. On the other hand, the width of the insulating-film sidewalls are independent of the limitation, permitting the size of the 64-Mbit mask ROM chip to be about 2 mm smaller.
REFERENCES:
patent: 4271421 (1981-06-01), McElroy
patent: 4805143 (1989-02-01), Matsumoto et al.
patent: 4989055 (1991-01-01), Redwine
patent: 5306941 (1994-04-01), Yoshida
Jackson Jerome
Kelley Nathan Kip
NEC Corporation
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