NAND memory with virtual channel

Details NAND memory with virtual channel NAND memory with virtual channel

2007-01-24

2009-02-24

Coleman, W. David (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S316000, C257SE27103, C257SE29129

Reexamination Certificate

active

07495282

ABSTRACT:
A string of nonvolatile memory cells are connected together by source/drain regions that include an inversion layer created by fixed charge in an overlying layer. Control gates extend between floating gates so that two control gates couple to a floating gate. A fixed charge layer may be formed by plasma nitridation.

REFERENCES:
patent: 5677556 (1997-10-01), Endoh
patent: 5923976 (1999-07-01), Kim
patent: 6888755 (2005-05-01), Harari
patent: 6905926 (2005-06-01), Lojek
patent: 2002/0014645 (2002-02-01), Kobayashi
patent: 2004/0079988 (2004-04-01), Harari
patent: 2004/0150032 (2004-08-01), Wu
patent: 2004/0164340 (2004-08-01), Arai
patent: 2005/0079662 (2005-04-01), Miki
patent: 2005/0184327 (2005-08-01), Ozawa
patent: 2005/0199939 (2005-09-01), Lutze et al.
patent: 2006/0138478 (2006-06-01), Buh
patent: 2006/0194388 (2006-08-01), Hashimoto
patent: 2006/0211205 (2006-09-01), Jeon
patent: 2006/0267067 (2006-11-01), Ishihara
Schmidt et al. “Inversion Layer Mobility of MOSFET's with Nitrided Oxide gate dielectrics”, IEEE Transactions on Electron Devices, vol. 35, No. 10 Cot. 1998, pp. 1627-1631.
U.S. Appl. No. 11/626,784, filed Jan. 24, 2007.
Office Action dated Jan. 22, 2008, U.S. Appl. No. 11/626,784, filed Jan. 24, 2007.
International Search Report and Written Opinion dated May 28, 2008 in PCT Application No. PCT/US2007/088145.
Schmidt et al. Inversion Layer Mobility of MOSFET's with Nitrided Oxide gate dielectrics, IEEE Transactions on Electron Devices, vol. 35, No. 10 Cot. 1998, pp. 11627-11631.
Chen et al. “Thermally-Enhanced remote Plasma Nitrided Ultrathin (1.65 nm) Gate Oxide with Excellent Performances in Reduction of Leakage Current and Boron Diffusion” IEEE Electron Device Letters, vol. 22, No. 8, Aug. 2001.
Office Action dated Jul. 23, 2008 in U.S. Appl. No. 11/626,784.
Response to Office Action dated Sep. 8, 2008 in U.S. Appl. No. 11/626,784.
Notice of Allowance and Fee(s) Due dated Oct. 22, 2008 in U.S. Appl. No. 11/626,784.

Affiliated with

Also associated with

Rating

NAND memory with virtual channel does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with NAND memory with virtual channel, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and NAND memory with virtual channel will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4102368