Nak throttling for USB host controllers

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying

Reexamination Certificate

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Details

C710S100000, C710S107000

Reexamination Certificate

active

07007110

ABSTRACT:
A method and apparatus for traversing a schedule with a bus master, the schedule having a plurality of elements, each element having information pertaining to one of a plurality of endpoints; executing transactions on a bus in accordance with the information pertaining to the plurality of endpoints; counting flow control events issued by individual endpoints; and skipping elements in the traversal of the schedule, the elements being skipped corresponding to endpoints which have issued a threshold number of flow control events.

REFERENCES:
patent: 4103148 (1978-07-01), Erickson
patent: 6073193 (2000-06-01), Yap
patent: 6119190 (2000-09-01), Garney
patent: 6311294 (2001-10-01), Larky et al.
patent: 6606674 (2003-08-01), Howard

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