N to 1 intelligent multiplexor

Details N to 1 intelligent multiplexor N to 1 intelligent multiplexor

2005-03-01

2005-03-01

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

C710S018000, C710S020000, C710S005000

Reexamination Certificate

active

06862633

ABSTRACT:
A multiplexor is designed to receive data from a plurality of data sources. As the multiplexor receives data from data sources, its programmable logic device codes each stream of data with a header and a footer and a data stream segment between them having a prescribed number of characters. A message from any particular data source may be coded into a plurality of separate data stream segments. The multiplexor sequences to the next data source when a data stream having the prescribed number of bytes has been captured and returns to that data source only after data streams of the same prescribed number of characters have been captured from the other data sources in a sequential manner. Data so coded is forwarded to a storage device that may store the data on any suitable storage medium for later retrieval.

REFERENCES:
patent: 4794589 (1988-12-01), Finch et al.
patent: 5363119 (1994-11-01), Snyder et al.
patent: 5675506 (1997-10-01), Savic
patent: 5784487 (1998-07-01), Cooperman
patent: 6038250 (2000-03-01), Shou et al.
patent: 6049525 (2000-04-01), Takahashi et al.

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