N-profile engineering at the poly/gate oxide and gate...

Details N-profile engineering at the poly/gate oxide and gate... N-profile engineering at the poly/gate oxide and gate...

1998-12-30

2002-08-27

Chaudhuri, Olik (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S653000, C438S657000, C438S660000, C438S775000

Reexamination Certificate

active

06440829

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor integrated circuit devices, most generally, and the processes for forming these devices. More specifically, this invention relates to the materials, processes, and structures used to suppress Boron penetration from a p
+
doped polysilicon structure through gate areas and into channel areas.
BACKGROUND OF THE INVENTION
Semiconductor integrated circuit devices include a thin dielectric material, commonly a thermally grown oxide, which functions as a gate dielectric for transistors incorporated into semiconductor integrated circuit devices. The gate dielectric material is typically formed on a semiconductor substrate over a region which will serve as a channel region. The transistors function when a channel is formed in the semiconductor substrate beneath the gate dielectric in response to a current being applied to a gate electrode formed atop the gate dielectric film. The quality and integrity of the gate dielectric film is critical to the functionality of the transistor devices, which include a very tightly defined set of operational characteristics which are very sensitive to the materials and methods used to form the transistor devices. It is important, therefore, to suppress the migration of any undesired dopant species into the gate dielectric film.
Polycrystalline silicon films are commonly used as interconnect materials and as the gates for transistors in semiconductor integrated circuits. Polycrystalline silicon is commonly “p-type” polycrystalline silicon. By “p-type” polysilicon material, it is meant that a p-type impurity is introduced into the polycrystalline silicon film. A commonly used, and preferred p-type dopant within the semiconductor industry is Boron. When Boron is used as an impurity dopant within a polycrystalline silicon film, it is of critical significance to maintain the Boron within the polycrystalline silicon film, and especially to suppress migration of this Boron dopant into the gate dielectric film which forms part of the transistor.
In addition to Boron diffusing into the gate dielectric material, the Boron can further diffuse through the gate dielectric material and into the channel region of the transistor formed below the gate dielectric region. When this occurs, device functionality can be destroyed. It is thus of increased significance to suppress the diffusion of Boron from the polysilicon interconnect and gate structures. Boron diffusion occurs during process steps which utilize elevated temperatures, and also during the operation of the completed device. It is therefore desirable to have a built-in means within the gate electrode/gate dielectric structure which will suppress Boron diffusion out of the polycrystalline silicon and into or through the gate dielectric material.
One approach to suppressing Boron diffusion as above, is to utilize a gate dielectric film which includes both an oxide film and a nitride film. An alternate, but similar approach utilizes an oxide film, a nitride film, and a second oxide film. While the combination of an oxide and nitride film to form a gate dielectric may be successful in suppressing Boron penetration from p
+
polysilicon into the underlying channel region, these gate structures introduce charge trapping and channel mobility problems. Completely formed nitride films, or completely formed nitride films in conjunction with oxide films, are therefore not desirable gate dielectric materials.
Because of the above problems associated with Boron diffusion, and the shortcomings of the contemporary attempts to suppress this diffusion by adding a nitride film into the gate material, there is a demonstrated need in the art to provide a process and structure which suppresses Boron penetration from p
+
polysilicon through gate areas and into channel areas without compromising silicide integrity, and while simultaneously improving gate oxide wear out and hot carrier aging behavior.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its proposes, the present invention addresses the shortcomings of the conventional attempts of suppressing Boron penetration without compromising the integrity of a subsequently formed silicide film. The present invention provides a process for ammonia annealing on a layered polysilicon/amorphous silicon structure onto which a silicide film may subsequently be formed. The layering feature results in stress accommodation and prevents abnormal grain growth during the re-crystallization of amorphous silicon as it becomes converted into polycrystalline silicon. The ammonia annealing urges the formation of a thin nitrogen impurity layer near the top layer of a gate dielectric material and at the interface between the gate dielectric material and the bottom of the layered silicon gate structure. The presence of this nitrogen impurity suppresses the diffusion of Boron from p
+
polysilicon, and through a dielectric gate and into the channel area. Additionally, the nitrogen impurity suppresses Boron penetration without compromising silicide integrity. This nitrogen impurity simultaneously enhances gate oxide integrity and improves gate oxide wear out characteristics and hot carrier aging behavior by reducing the density of sites available in the gate oxide for trapping charges. The present invention also prevents the charge trapping and channel mobility problems associated with a nitride gate dielectric film formed using conventional methods. The present invention finds application in any dual or multi-layer silicon films in various technologies including CMOS and bi-CMOS technologies.


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