N-PI phase/frequency detector

Details N-PI phase/frequency detector N-PI phase/frequency detector

1988-03-01

1989-10-31

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

375119, 328133, H04L 2714

Patent

active

048782319

ABSTRACT:
A digital phase/frequency detector circuit in a phase locked loop comprises multiple bistable devices which are clocked up and down respectively by input and references digital signals to generate square waves. The duty ratio corresponds to the phase/frequency difference and sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square waves are combined logically and additively in the output. The output is integrated to obtain an ever increasing output over many cycles of the phase/frequency difference until the maximum is reached depending on the number of bistable devices which are used. Added circuitry is used to avoid coincidence problems in the clocking input and reference digital signals, to minimize resultant irregularities, and hold the bistable devices at maximum or minimum, as appropriate, until the direction of phase/frequency difference reverses. At either maximum or minimum a sawtooth waveform exists of one magnitude of value out of many magnitudes of value between maximum and minimum. The many magnitudes depend on the number of bistable devices.

REFERENCES:
patent: 4052672 (1977-10-01), Enderby et al.
patent: 4320527 (1982-03-01), Takasaki
patent: 4357707 (1982-11-01), Delury
patent: 4371974 (1983-02-01), Dugan
patent: 4400817 (1983-08-01), Sumner
patent: 4535461 (1985-08-01), Stepp et al.
patent: 4546331 (1985-10-01), DaSilva et al.
patent: 4554672 (1985-11-01), Masamura et al.

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