N-gate transistor

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S585000, C257S344000, C257S408000

Reexamination Certificate

active

06960517

ABSTRACT:
A n-gate transistor, and method of forming such, including source/drain regions connected by a channel region and a gate electrode coupled to the channel region. The channel region has many angled edges protruding into the gate electrode. The many angled edges are to act as electrically conducting channel conduits between source/drain regions.

REFERENCES:
patent: 4818715 (1989-04-01), Chao
patent: 4907048 (1990-03-01), Huang
patent: 4994873 (1991-02-01), Madan
patent: 5880015 (1999-03-01), Hata
patent: 6437550 (2002-08-01), Andoh et al.
Chau, Robert, et al., Advanced Depleted-Substrate Transistors: Single-gate, Double-gate and Tri-gate (Invited Paper), Components Research, Logic Technology.
Development, Intel Corporation, 5200 N.E. Elam Young Parkway, HIllsboro, OR 97124, Mail stop RA1-232, USA, 2 pages, no date.

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