Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1976-09-10
1978-04-18
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Data refresh
365 75, 365184, G11C 700, G11C 1156
Patent
active
040854590
ABSTRACT:
A memory system includes means for injecting a multivalued signal with at least three information carrying voltage levels, in the form of electric charge, to a charge coupled device (CCD); and a detection means for detecting a multivalued signal level read out from the output terminal of CCD and feeding the voltage of the level back to the injecting means. The detection means comprises a level detection section for generating a combination of outputs predetermined correspondingly to the multivalued signal level and an output section for generating upon receipt of the combination of outputs an output having a voltage level corresponding to the combination of outputs.
REFERENCES:
patent: 3891977 (1975-06-01), Amelio et al.
patent: 3909806 (1975-09-01), Uchida
patent: 3956624 (1976-05-01), Audaire et al.
patent: 3958210 (1976-05-01), Levine
Hecker Stuart N.
McElheny Donald
Tokyo Shibaura Electric Co. Ltd.
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