Multivalue memory storage with two gating transistors

Static information storage and retrieval – Systems using particular element – Ternary

Reexamination Certificate

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C365S149000, C365S189070

Reexamination Certificate

active

07609546

ABSTRACT:
Digital memory devices and systems, as well as methods of operating digital memory devices, that include a multivalue memory cell with a first and a second gating transistor arranged in parallel, having a first and a second node, respectively, coupled to a storage element, and sensing circuitry coupled to a third and a fourth node of the first and second gating transistors, respectively, to sense a stored voltage of the memory cell. In embodiments, the first and second gating transistors are configured to activate at different threshold voltage levels.

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patent: 5623440 (1997-04-01), Saito
patent: 5771187 (1998-06-01), Kapoor
patent: 5808932 (1998-09-01), Irrinki et al.
patent: 5991191 (1999-11-01), Rao
patent: 6005799 (1999-12-01), Rao
patent: 2005/0289293 (2005-12-01), Parris et al.
International Search Report and Written Opinion mailed Feb. 3, 2009 in PCT/US2008/079420.

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