Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-05-16
2006-05-16
Torres, Joseph D. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S784000
Reexamination Certificate
active
07047478
ABSTRACT:
Described is an error control method for multilevel memory cells operating with a variable number of storage levels. The method includes: receiving a first information word having k input symbols each in a first base; converting the first information word into a second base by converting the input symbols into input symbols in the second base; encoding the converted first information word into a first codeword having k+n coded symbols in the second base; and writing the first codeword into the multilevel memory cells. The encoding step may include generating a generating matrix and multiplying the first information word by the generating matrix to produce the first codeword.
REFERENCES:
patent: 5574879 (1996-11-01), Wells et al.
patent: 5754566 (1998-05-01), Christopherson et al.
patent: 6233717 (2001-05-01), Choi
patent: 6378104 (2002-04-01), Okita
Ferrari Pietro
Gregori Stefano
Torelli Guido
Iannucci Robert
Jorgenson Lisa K.
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
Torres Joseph D.
LandOfFree
Multipurpose method for constructing an error-control code... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multipurpose method for constructing an error-control code..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multipurpose method for constructing an error-control code... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3536207