Multipurpose graded silicon oxynitride cap layer

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257314, 257316, H01L 21331, H01L 218222

Patent

active

061005592

ABSTRACT:
A graded cap layer that reduces the overall height of a layer stack and provides for increased process control during subsequent patterning of the layer stack, is described with a method of making the same. The graded cap layer is configured to function as a cap layer to prevent an underlying silicide layer from lifting, a barrier layer to prevent the underlying silicide layer from being oxidized during subsequent processes, a stop layer to prevent over-etching during subsequent self-aligned source (SAS) patterning processes, and/or an anti-reflective coating (ARC) to improve the resolution of subsequent patterning processes. The graded cap layer is a relatively thin layer of silicon oxynitride with varying concentrations of nitrogen. The cap layer is deposited in a single chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) chamber.

REFERENCES:
patent: 4889583 (1989-12-01), Chen et al.
patent: 5674356 (1997-10-01), Nagayama
patent: 5679591 (1997-10-01), Lin et al.
patent: 5918147 (1999-06-01), Filipiak et al.
patent: 5933729 (1999-08-01), Chan

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