Boots – shoes – and leggings
Patent
1980-05-06
1982-12-21
Thomas, James D.
Boots, shoes, and leggings
G06F 1300
Patent
active
043652956
ABSTRACT:
A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by either bus.
The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code. The memory system includes a map which translates logical addresses to physical addresses and which coacts with the multiprocessor system to bring pages from secondary memory into primary main memory as required to implement a virtual memory system. The map also provides a protection function. It provides inherent protection among users in a multiprogramming environment, isolates programs from data and protects system programs from the actions of user programs. The map also provides a reference history information for each logical page as an aid to efficient memory management by the operating system.
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patent: 3577185 (1971-05-01), Belady
patent: 3786427 (1974-01-01), Schmidt et al.
patent: 3893084 (1975-07-01), Kotok et al.
patent: 4042911 (1977-08-01), Bourke et al.
patent: 4177510 (1979-10-01), Appell et al.
S. Madnick, "Operating System", 1974 McGraw-Hill, pp. 139-157.
Bartlett Joel F.
Bixler Richard M.
Davidow William H.
Despotakis John A.
Graziano Peter J.
Eakin James E.
Eng David Y.
Feix Donald C.
Tandem Computers Incorporated
Thomas James D.
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