Multiprocessor system supporting multiple outstanding TLBI...

Details Multiprocessor system supporting multiple outstanding TLBI... Multiprocessor system supporting multiple outstanding TLBI...

2006-07-04

2006-07-04

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S146000, C711S003000, C711S144000

Reexamination Certificate

active

07073043

ABSTRACT:
Disclosed is a symmetric multiprocessor data processing system (SMP) that implements a TLBI protocol, which enables multiple TLBI operations from multiple processors within a partition to complete concurrently. Thus, a global TLB lock, synchronization, and TLB unlock is not necessary. When a TLBI instruction is executed, the master dynamically manages the behavior of the TLBI operation based on asynchronously snooping another TLBI. If concurrent TLBI management is required, then the master dynamically degrades the TLBI to a “barrier” class instruction.

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