Multiprocessor system providing enhanced efficiency of accessing

Details Multiprocessor system providing enhanced efficiency of accessing Multiprocessor system providing enhanced efficiency of accessing

1990-08-13

1999-03-23

Treat, William M.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711147, G06F 15167

Patent

active

058871888

ABSTRACT:
In a multiprocessor system in which a master processor and a plurality of slave processors access in common a page mode memory, each slave processor functions such that upon completion of a memory access by the slave processor, the page address which was being accessed prior to that access by the slave processor is reloaded into the page buffer of the memory. Since in general each access by a slave processor is preceded by and followed by an access by the master processor, generally to the same page of the memory, this reduces the number of long accesses that must be executed by the master processor as a result of intervening accesses by slave processors.

REFERENCES:
patent: 4814970 (1989-03-01), Barbagelata et al.
patent: 4912630 (1990-03-01), Cochcroft, Jr.
patent: 4959777 (1990-09-01), Holman, Jr.
patent: 4984209 (1991-01-01), Rajaram et al.
patent: 5155809 (1992-10-01), Baker et al.
patent: 5159676 (1992-10-01), Wicklund et al.

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